HIP: Heterogenous-computing Interface for Portability
Classes | Macros | Typedefs | Enumerations
Global enum and defines

Classes

struct  dim3
 
struct  hipLaunchParams_t
 

Macros

#define __HIP_NODISCARD
 
#define hipStreamDefault   0x00
 Flags that can be used with hipStreamCreateWithFlags. More...
 
#define hipStreamNonBlocking   0x01
 Stream does not implicitly synchronize with null stream.
 
#define hipEventDefault   0x0
 Flags that can be used with hipEventCreateWithFlags: More...
 
#define hipEventBlockingSync   0x1
 Waiting will yield CPU. Power-friendly and usage-friendly but may increase latency.
 
#define hipEventDisableTiming   0x2
 Disable event's capability to record timing information. May improve performance.
 
#define hipEventInterprocess   0x4
 Event can support IPC. More...
 
#define hipEventReleaseToDevice   0x40000000
 
#define hipEventReleaseToSystem   0x80000000
 
#define hipHostMallocDefault   0x0
 Flags that can be used with hipHostMalloc. More...
 
#define hipHostMallocPortable   0x1
 Memory is considered allocated by all contexts.
 
#define hipHostMallocMapped   0x2
 can be obtained with hipHostGetDevicePointer. More...
 
#define hipHostMallocWriteCombined   0x4
 
#define hipHostMallocCoherent   0x40000000
 allocation. More...
 
#define hipHostMallocNonCoherent   0x80000000
 allocation. More...
 
#define hipMemAttachGlobal   0x0
 
#define hipMemAttachHost   0x1
 
#define hipDeviceMallocDefault   0x0
 
#define hipDeviceMallocFinegrained   0x1
 Memory is allocated in fine grained region of device.
 
#define hipHostRegisterDefault   0x0
 Flags that can be used with hipHostRegister. More...
 
#define hipHostRegisterPortable   0x1
 Memory is considered registered by all contexts.
 
#define hipHostRegisterMapped   0x2
 can be obtained with hipHostGetDevicePointer. More...
 
#define hipHostRegisterIoMemory   0x4
 Not supported.
 
#define hipExtHostRegisterCoarseGrained   0x8
 Coarse Grained host memory lock.
 
#define hipDeviceScheduleAuto   0x0
 Automatically select between Spin and Yield.
 
#define hipDeviceScheduleSpin   0x1
 may consume more power. More...
 
#define hipDeviceScheduleYield   0x2
 power and is friendlier to other threads in the system. More...
 
#define hipDeviceScheduleBlockingSync   0x4
 
#define hipDeviceScheduleMask   0x7
 
#define hipDeviceMapHost   0x8
 
#define hipDeviceLmemResizeToMax   0x16
 
#define hipArrayDefault   0x00
 Default HIP array allocation flag.
 
#define hipArrayLayered   0x01
 
#define hipArraySurfaceLoadStore   0x02
 
#define hipArrayCubemap   0x04
 
#define hipArrayTextureGather   0x08
 

Typedefs

typedef enum __HIP_NODISCARD hipError_t hipError_t
 
typedef enum hipDeviceAttribute_t hipDeviceAttribute_t
 
typedef enum hipJitOption hipJitOption
 
typedef enum hipFuncCache_t hipFuncCache_t
 
typedef enum hipSharedMemConfig hipSharedMemConfig
 
typedef struct dim3 dim3
 
typedef struct hipLaunchParams_t hipLaunchParams
 

Enumerations

enum  hipDeviceAttribute_t {
  hipDeviceAttributeMaxThreadsPerBlock, hipDeviceAttributeMaxBlockDimX, hipDeviceAttributeMaxBlockDimY, hipDeviceAttributeMaxBlockDimZ,
  hipDeviceAttributeMaxGridDimX, hipDeviceAttributeMaxGridDimY, hipDeviceAttributeMaxGridDimZ, hipDeviceAttributeMaxSharedMemoryPerBlock,
  hipDeviceAttributeTotalConstantMemory, hipDeviceAttributeWarpSize, hipDeviceAttributeMaxRegistersPerBlock, hipDeviceAttributeClockRate,
  hipDeviceAttributeMemoryClockRate, hipDeviceAttributeMemoryBusWidth, hipDeviceAttributeMultiprocessorCount, hipDeviceAttributeComputeMode,
  hipDeviceAttributeL2CacheSize, hipDeviceAttributeMaxThreadsPerMultiProcessor, hipDeviceAttributeComputeCapabilityMajor, hipDeviceAttributeComputeCapabilityMinor,
  hipDeviceAttributeConcurrentKernels, hipDeviceAttributePciBusId, hipDeviceAttributePciDeviceId, hipDeviceAttributeMaxSharedMemoryPerMultiprocessor,
  hipDeviceAttributeIsMultiGpuBoard, hipDeviceAttributeIntegrated, hipDeviceAttributeCooperativeLaunch, hipDeviceAttributeCooperativeMultiDeviceLaunch
}
 
enum  hipComputeMode { hipComputeModeDefault = 0, hipComputeModeExclusive = 1, hipComputeModeProhibited = 2, hipComputeModeExclusiveProcess = 3 }
 
enum  hipJitOption {
  hipJitOptionMaxRegisters = 0, hipJitOptionThreadsPerBlock, hipJitOptionWallTime, hipJitOptionInfoLogBuffer,
  hipJitOptionInfoLogBufferSizeBytes, hipJitOptionErrorLogBuffer, hipJitOptionErrorLogBufferSizeBytes, hipJitOptionOptimizationLevel,
  hipJitOptionTargetFromContext, hipJitOptionTarget, hipJitOptionFallbackStrategy, hipJitOptionGenerateDebugInfo,
  hipJitOptionLogVerbose, hipJitOptionGenerateLineInfo, hipJitOptionCacheMode, hipJitOptionSm3xOpt,
  hipJitOptionFastCompile, hipJitOptionNumOptions
}
 
enum  hipFuncCache_t { hipFuncCachePreferNone, hipFuncCachePreferShared, hipFuncCachePreferL1, hipFuncCachePreferEqual }
 
enum  hipSharedMemConfig { hipSharedMemBankSizeDefault, hipSharedMemBankSizeFourByte, hipSharedMemBankSizeEightByte }
 

Detailed Description

Macro Definition Documentation

#define hipDeviceScheduleSpin   0x1

may consume more power.

Dedicate a CPU core to spin-wait. Provides lowest latency, but burns a CPU core and

#define hipDeviceScheduleYield   0x2

power and is friendlier to other threads in the system.

Yield the CPU to the operating system when waiting. May increase latency, but lowers

#define hipEventDefault   0x0

Flags that can be used with hipEventCreateWithFlags:

Default flags

#define hipEventInterprocess   0x4

Event can support IPC.

Warning
- not supported in HIP.
#define hipEventReleaseToSystem   0x80000000

< Use a device-scope release when recording this event. This flag is useful to obtain more precise timings of commands between events. The flag is a no-op on CUDA platforms.

#define hipHostMallocCoherent   0x40000000

allocation.

Allocate coherent memory. Overrides HIP_COHERENT_HOST_ALLOC for specific

#define hipHostMallocDefault   0x0

Flags that can be used with hipHostMalloc.

< Use a system-scope release that when recording this event. This flag is useful to make non-coherent host memory visible to the host. The flag is a no-op on CUDA platforms.

#define hipHostMallocMapped   0x2

can be obtained with hipHostGetDevicePointer.

Map the allocation into the address space for the current device. The device pointer

#define hipHostMallocNonCoherent   0x80000000

allocation.

Allocate non-coherent memory. Overrides HIP_COHERENT_HOST_ALLOC for specific

#define hipHostRegisterDefault   0x0

Flags that can be used with hipHostRegister.

Memory is Mapped and Portable

#define hipHostRegisterMapped   0x2

can be obtained with hipHostGetDevicePointer.

Map the allocation into the address space for the current device. The device pointer

#define hipStreamDefault   0x00

Flags that can be used with hipStreamCreateWithFlags.

Default stream creation flags. These are used with hipStreamCreate().

Typedef Documentation

typedef struct dim3 dim3

Struct for data in 3D

Warning
On AMD devices and some Nvidia devices, these hints and controls are ignored.
Warning
On AMD devices and some Nvidia devices, these hints and controls are ignored.

Enumeration Type Documentation

Enumerator
hipDeviceAttributeMaxThreadsPerBlock 

Maximum number of threads per block.

hipDeviceAttributeMaxBlockDimX 

Maximum x-dimension of a block.

hipDeviceAttributeMaxBlockDimY 

Maximum y-dimension of a block.

hipDeviceAttributeMaxBlockDimZ 

Maximum z-dimension of a block.

hipDeviceAttributeMaxGridDimX 

Maximum x-dimension of a grid.

hipDeviceAttributeMaxGridDimY 

Maximum y-dimension of a grid.

hipDeviceAttributeMaxGridDimZ 

Maximum z-dimension of a grid.

hipDeviceAttributeMaxSharedMemoryPerBlock 

Maximum shared memory available per block in bytes.

hipDeviceAttributeTotalConstantMemory 

Constant memory size in bytes.

hipDeviceAttributeWarpSize 

Warp size in threads.

hipDeviceAttributeMaxRegistersPerBlock 

Maximum number of 32-bit registers available to a thread block. This number is shared by all thread blocks simultaneously resident on a multiprocessor.

hipDeviceAttributeClockRate 

Peak clock frequency in kilohertz.

hipDeviceAttributeMemoryClockRate 

Peak memory clock frequency in kilohertz.

hipDeviceAttributeMemoryBusWidth 

Global memory bus width in bits.

hipDeviceAttributeMultiprocessorCount 

Number of multiprocessors on the device.

hipDeviceAttributeComputeMode 

Compute mode that device is currently in.

hipDeviceAttributeL2CacheSize 

Size of L2 cache in bytes. 0 if the device doesn't have L2 cache.

hipDeviceAttributeMaxThreadsPerMultiProcessor 

Maximum resident threads per multiprocessor.

hipDeviceAttributeComputeCapabilityMajor 

Major compute capability version number.

hipDeviceAttributeComputeCapabilityMinor 

Minor compute capability version number.

hipDeviceAttributeConcurrentKernels 

Device can possibly execute multiple kernels concurrently.

hipDeviceAttributePciBusId 

PCI Bus ID.

hipDeviceAttributePciDeviceId 

PCI Device ID.

hipDeviceAttributeMaxSharedMemoryPerMultiprocessor 

Maximum Shared Memory Per Multiprocessor.

hipDeviceAttributeIsMultiGpuBoard 

Multiple GPU devices.

hipDeviceAttributeIntegrated 

iGPU

hipDeviceAttributeCooperativeLaunch 

Support cooperative launch.

hipDeviceAttributeCooperativeMultiDeviceLaunch 

Support cooperative launch on multiple devices.

Warning
On AMD devices and some Nvidia devices, these hints and controls are ignored.
Enumerator
hipFuncCachePreferNone 

no preference for shared memory or L1 (default)

hipFuncCachePreferShared 

prefer larger shared memory and smaller L1 cache

hipFuncCachePreferL1 

prefer larger L1 cache and smaller shared memory

hipFuncCachePreferEqual 

prefer equal size L1 cache and shared memory

Warning
On AMD devices and some Nvidia devices, these hints and controls are ignored.
Enumerator
hipSharedMemBankSizeDefault 

The compiler selects a device-specific value for the banking.

hipSharedMemBankSizeFourByte 

Shared mem is banked at 4-bytes intervals and performs best when adjacent threads access data 4 bytes apart.

hipSharedMemBankSizeEightByte 

Shared mem is banked at 8-byte intervals and performs best when adjacent threads access data 4 bytes apart.